The CD4033 is a CMOS Decade Counter/Divider with decoded 7-segment display outputs and ripple blanking. It consists of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoded output for driving one stage in a numerical display. It is particularly advantageous in display applications where low power dissipation is important. Inputs common to both types are clock, reset and clock inhibit, common outputs are carry out and the seven decoded outputs (a, b, c, d, e, f, g). Signals peculiar to the CD4033B are ripple-blanking input and lamp test input and a ripple-blanking output. A high reset signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the clock inhibit signal is low.