The CD4063 is a 4-bit Magnitude Comparator designed for use in computer and logic applications that require the comparison of two 4-bit words. This logic circuit determines whether one 4-bit word (Binary or BCD) is ‘less than, ‘equal to’ or ‘greater than’ a second 4-bit word. The CD4063B has eight comparing inputs (A3, B3, through A0, B0), three outputs (A <B, A = B, A >B) and three cascading inputs (A <B, A = B, A >B) that permit systems designers to expand the comparator function to 8, 12, 16 . . . 4N bits. For words longer than 4 bits, CD4063B device may be cascaded by connecting the outputs of the less-significant comparator to the corresponding cascading inputs of the more-significant comparator. Cascading inputs (A <B, A = B and A >B) on the least significant comparator are connected to a low, a high and a low level, respectively.